As technology scales beyond 16-nanometer technology node, the performance of copper interconnects in circuits is approaching its fundamental physical limit.
Timing and reliability issues that perplex copper interconnects limit circuit miniaturization.
Wires made from copper have very small cross-sectional areas. This results in increased wire resistance and excessive interconnect delay. In fact, interconnect delay has become the limiting factor for chip timing.
Due to the fundamental physical limits of copper wires, novel on-chip interconnect materials—carbon nanotubes and graphene nanoribbons—are more desirable due to their many salient features including superior electrical conductivity, increased electromigration, high thermal conductivity, and mechanical strength.
Shiyan Hu seeks to bring together the benefits of both copper interconnects and carbon nanotubes and/or graphene nanoribbons.
With a $430,000 Faculty Early Career Development (CAREER) Award from the National Science Foundation, Hu will develop an innovative codesign methodology for next-generation integrated circuits (IC)s.
The wires in a typical computer chip are very narrow indeed: with a width of about 22 nanometers, each bundle of a thousand is no bigger than a human hair.
“Those wires have been getting thinner and thinner, because people want their chips to do more and more things, and for that you need more and more transistors, billions on a single chip,” Hu explains. “But then the chip gets slower and slower … unless you do some magic.”
Hu will develop a variety of physical design automation techniques. A key feature will be a “variation-aware” codesign technique for the new methodology to compensate for variation and defects.
“The replacement of copper interconnects should be performed gradually in order to judiciously integrate the benefits of both technologies,” adds Hu.
“My goal is to integrate pioneering nanotechnologies into practical circuit design,” Hu explains. “I think we can revolutionize the prevailing circuit design paradigm.”
Hu’s other research interests include embedded system designs for smart homes, microfluidic biochip design, and buffer insertion, which greatly improves integrated circuits’ timing performance.